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d a t a sh eet product speci?cation supersedes data of november 1992 file under integrated circuits, ic02 october 1994 integrated circuits philips semiconductors TDA8742; TDA8742h satellite sound circuit with noise reduction
october 1994 2 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h features demodulation of main audio signal using wide band pll (lock range selectable) hf input selection: two-out-of-eight secondary audio signals can be selected demodulation of secondary audio signals using wide band pll noise reduction of the secondary audio signals output selection: stereo, language 1, language 2, main audio and external mute control line outputs (scart level). applications satellite receivers tv sets video recorders. general description the TDA8742; TDA8742h is a multi-function sound ic for use in satellite receivers, television sets and video recorders. the pin numbers given in parenthesis throughout this document refer to the qfp44 package. quick reference data symbol parameter conditions min. typ. max. unit supply v p supply voltage 8 12 13.2 v main channel v in3(rms) input sensitivity pin 18 (14) (rms value) s/n(a) = 40 db - 1.0 2.0 mv d f om lock range pll demodulator either 5.5 - 7.5 mhz or 10.0 - 11.5 mhz v om output voltage pin 23 (19) - 9 - 6 - 4 dbv s/n(a) signal-to-noise ratio a-weighted 62 70 - db secondary channels v in1,in2(rms) input sensitivity pins 2, 4, 6, 8, 10, 12, 14 and 16 (1, 3, 5, 7, 9, 11, 40 and 42) (rms value) s/n(a) = 40 db - 0.8 1.5 mv d f os1,2 lock range pll demodulators 10.0 - 11.5 mhz v or,ol output voltage pins 24 and 25 (20 and 21) - 8 - 6 - 4 dbv s/n(a) signal-to-noise ratio a-weighted 72 80 - db crosstalk a s/m crosstalk from secondary to main channel - 74 - db a m/s crosstalk from main to secondary channel - 74 - db a s/s crosstalk between secondary channels - 74 - db
october 1994 3 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h ordering information note 1. when using ir reflow soldering it is recommended that the drypack instructions in the quality reference handbook (order number 9398 510 63011) are followed. block diagram type number package name description version TDA8742 sdip42 plastic shrink dual in-line package; 42 leads (600 mil) sot270-1 TDA8742h qfp44 (1) plastic quad ?at package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm sot307-2 fig.1 block diagram. the pin numbers in parenthesis refer to the qfp44 package.
october 1994 4 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h pinning symbol pin sdip42 pin qfp44 description n.c. 1 39 not connected in-1a 2 40 intercarrier input a for channel 1 (left) i sel 1 3 41 input select switch bit 1 in-1b 4 42 intercarrier input b for channel 1 (left) i sel 2 5 43 input select switch bit 2 in-1c 6 1 intercarrier input c for channel 1 (left) mcs 7 2 main channel pll lock-in range select/disable in-1d 8 3 intercarrier input d for channel 1 (left) hfgnd 9 4 ground for hf section in-2a 10 5 intercarrier input a for channel 2 (right) scd 11 6 secondary channels plls disable in-2b 12 7 intercarrier input b for channel 2 (right) mute 13 8 mute switch in-2c 14 9 intercarrier input c for channel 2 (right) o sel l 15 10 output select switch bit 1 (left) in-2d 16 11 intercarrier input d for channel 2 (right) o sel r 17 13 output select switch bit 2 (right) in-3 18 14 intercarrier input for main channel v ref 19 15 decoupling capacitor for reference voltage c d m 20 16 de-emphasis capacitor for main channel c c m 21 17 audio pass-through capacitor input for main channel v p 22 18 positive supply voltage o m 23 19 main channel output o r 24 20 right channel output o l 25 21 left channel output ext/ int 26 22 output switch bit 3 (external/internal) ext r 27 23 external audio input (right) ext l 28 24 external audio input (left) c att/rec r 29 25 attack/recovery capacitor (right) rect r 30 26 recti?er dc decoupling (right) c nr d r 31 27 noise reduction de-emphasis capacitor (right) c d r 32 28 ?xed de-emphasis capacitor (right) c c r 33 29 audio pass-through capacitor input for right channel afgnd 34 30 ground for af section c c l 35 31 audio pass-through capacitor input for left channel c d l 36 32 ?xed de-emphasis capacitor (left) c nr d l 37 33 noise reduction de-emphasis capacitor (left) rect l 38 34 recti?er dc decoupling (left) c att/rec l 39 35 attack/recovery capacitor (left)
october 1994 5 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h c dc l 40 36 dc decoupling capacitor (left) c dc m 41 37 dc decoupling capacitor (main) c dc r 42 38 dc decoupling capacitor (right) n.c. - 12 not connected n.c. - 44 not connected symbol pin sdip42 pin qfp44 description fig.2 pin configuration (sdip42).
october 1994 6 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h fig.3 pin configuration (qfp44).
october 1994 7 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h functional description satellite sound the baseband signal coming from a satellite tuner contains the demodulated video signal plus a number of sound carriers to facilitate reception of a pal/ntsc/secam satellite signal. nearest to the video signal is the main sound carrier which carries the single channel sound related to the video. this is an fm modulated carrier with a fixed pre-emphasis. the carrier frequency can be in the range of 5.8 to 6.8 mhz. additionally, a number of optional secondary sound carriers may be present which can be used for stereo or multi-language sound related to the video, or for unrelated radio sound. these carriers are also fm modulated, but for better sound quality (improved signal-to-noise performance) broadcast satellites (e.g. astra) use a noise reduction system (adaptive pre-emphasis circuit, combined with a fixed pre-emphasis). these secondary carrier frequencies can be in the range of 6.30 to 8.28 mhz. the TDA8742; h contains all circuitry for processing the main channel and for two secondary channels, from baseband signal to line (scart) output drivers. the desired frequencies can be routed to the device via bandpass filters. main channel (see fig.1) the lock-in range of the main channel pll can be switched between 5.5 to 7.5 mhz, pll off and 10.0 to 11.5 mhz using the mcs signal at pin 7 (2) [when pin 7 (2) is at logic 0, being a voltage from 0 to 1.2 v, the lock-in range = 5.5 to 7.5 mhz; when pin 7 (2) is at logic 1, being a voltage from 3.5 v until v p , the lock-in range = 10.0 to 11.5 mhz; when pin 7 (2) is in the mid voltage position, being a voltage from 1.8 to 2.8 v, the main channel pll is switched off]. the voltage is then determined by the resistor divider at this pin between v p and ground. if only one fixed carrier frequency for the main channel is to be demodulated (e.g. 6.5 mhz), the lock-in range of the pll should be switched to 5.5 to 7.5 mhz. the baseband signal is applied to the main channel input, pin 18 (14) via a 6.5 mhz ceramic bandpass filter. alternatively, if there is a requirement to demodulate different main channel frequencies, these frequencies can be transferred to a fixed intermediate frequency (e.g. 10.7 mhz) using an external mixer and oscillator-frequency synthesizer. in this event the lock-in range of the pll should be switched to 10.0 to 11.5 mhz. the if signal is applied to the main channel input, pin 18 (14) via a 10.7 mhz ceramic bandpass filter. the filtered signal is ac-coupled to a limiter/amplifier and then to a pll demodulator. the pll fm demodulator ensures that the demodulator is alignment-free. high gain and dc error signals from the pll, which are superimposed on the demodulator output, require dc decoupling. a buffer amplifier is used to amplify the signal to the same level as the secondary channels and decouples dc using an electrolytic capacitor connected to pin 41 (37). the demodulator output signal is fed to pin 20 (16) via an internal resistor. the output signal can be de-emphasized by means of this resistor and an external capacitor connected to ground. capacitor value = de-emphasis time constant per1500 (for 50 m s: 33 nf). from here the signal is fed to the output selectors. the signal is amplified to 500 mv (rms) (i.e. - 6 dbv) in the output amplifiers. secondary channels up to eight secondary channels are available at pins 2, 4, 6, 8, 10, 12, 14 and 16 (1, 3, 5, 7, 9, 11, 40 and 42). external ceramic bandpass filters, tuned to the required secondary sound carrier frequencies, route these signals to the inputs. this enables the demodulation of eight different channel; frequencies, which are derived from the baseband, by using an external mixer and oscillator frequency synthesizer. for stereo applications the TDA8742; TDA8742h contains two identical secondary sound processing channels. for each channel it is possible to select from four inputs (in-a, in-b, in-c and in-d) using the input selector (see table 1). with the input switch several stereo signals or languages can be selected for demodulation. it should be noted that the inputs are identical and can be freely interchanged secondary channel 1 will also be referred to as left or language 1 and secondary channel 2 will also be referred to as right or language 2. from the input selector switch the signals are coupled to limiter/amplifiers and then to the pll demodulators. processing is similar to the main channel. the demodulator output signal is amplified in a buffer amplifier and dc decoupled using electrolytic capacitors connected to pins 40 (36) (left) and 42 (38) (right). the output level is set with a 220 w resistor connected in series with the capacitor.
october 1994 8 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h high frequency components in the amplified pll output signal are filtered out in the audio lpf block (4th order butterworth low-pass filter) to prevent unwanted influence on the noise reduction. n oise reduction (nr) the noise reduction can be regarded as an input level-dependent low-pass filter (adaptive de-emphasis system) followed by a fixed de-emphasis. with maximum input level (0 db) the frequency response of the first part (i.e. without the fixed de-emphasis) is virtually flat. as the input level is lowered by x-db, the higher output frequencies will be reduced an extra x-db with respect to the lower frequencies (1 : 2 expansion). the nr output signal is fed to pin 36 (32) (left) and pin 32 (28) (right) via an internal resistor. fixed de-emphasis is achieved by these resistors and external capacitors connected to ground. the signals are dc decoupled via pins 36/35 (32/31) and 32/33 (28/29) and then routed to the output selectors. o utput selection with the output selector (see table 2) the outputs at pins 25 and 24 (21 and 20) can be switched to the different channels. both outputs can be switched to both secondary channels, to the main channel and to the external inputs at pin 28 and 27 (24 and 23) for ic chaining purposes. pin 23 (19) is a separate output which delivers the main channel only, thereby creating the possibility of having three different output channels simultaneously e.g. for use in hi-fi vcrs. the outputs at pins 25 and 24 (21 and 20) can be muted by setting the mute signal at pin 13 (8) to logic 1 (switch positions 6 and 7). the output at pin 23(19) can be muted by setting the mute signal and the ext/ int signal at pin 26 (22) both logic 1 (switch position 7). all outputs at pins 23, 24 and 25 (19, 20 and 21) are line drivers with scart level capability and are short-circuit protected by 125 w output resistors. output level of all channels = - 6 dbv typical when frequency deviation of fm signal is 54% of maximum frequency deviation (i.e. 0.54 85 khz = 46 khz for the main channel and 0.54 50 khz = 27 khz for the secondary channels) at 1 khz modulation frequency (reference level). abbreviations f mod = modulating frequency. d f m = frequency deviation of the main channel. d f s1 = frequency deviation of secondary channel 1 (left). d f s2 = frequency deviation of secondary channel 2 (right). f om = carrier frequency of main channel. f os1 = carrier frequency of secondary channel 1. f os2 = carrier frequency of secondary channel 2. lpf = low-pass filter. nr = noise reduction. pll = phase-locked-loop.
october 1994 9 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. all voltages referenced to ground pins 9 and 34 (4 and 30). 2. all voltages referenced to ground pins 9 and 34 (4 and 30). these voltages must not exceed v p or maximum value at any time. thermal characteristics dc characteristics all voltages referenced to ground at pins 9 and 34 (4 and 30). measured in test circuit fig.4; v p =12v; t amb =25 c; d f m = d f s1 = d f s2 = 0 khz (no modulation); f om = 6.5 mhz; f os1 = 10.52 mhz; f os2 = 10.7 mhz; hf level at pin 18 (14): 40 mv (rms); hf level at selected secondary inputs: 20 mv (rms); mcs = logic 0 [v 7 (v 2 )=0v]; scd = logic 0 [v 11 (v 6 ) = 0 v]; unless otherwise speci?ed. symbol parameter conditions min. max. unit v p supply voltage note 1 0 13.2 v v n voltage level on pins 2, 4, 6, 8, 10, 12, 14 and 16 (1, 3, 5, 7, 9, 11, 40 and 42) note 2 0 1 v v n voltage on pins 3, 5, 11, 13, 15, 17, 20, 21, 23 to 26, 31, 33, 35, 37, 40, 41, and 42 (6, 8, 10, 13, 16, 17, 19, 20 to 22, 27, 29, 31, 33, 36, 37, 38, 41 and 43) note 2 0 9 v v n voltage on pins 7, 18, 19, 27 to 30, 32, 36, 38 and 39 (2, 14, 15, 23 to 26, 28, 32, 34 and 35) note 1 0 v p v t stg storage temperature - 55 +150 c t amb operating ambient temperature - 20 +70 c symbol parameter value unit r th j-a thermal resistance from junction to ambient in free air sdip42 53 k/w qfp44 69 k/w symbol parameter min. typ. max. unit v p supply voltage 8.0 12 13.2 v i p supply current - 38 45 ma p tot total power dissipation -- 600 mw v n voltage on pins 20, 21, 23, 24, 25, 27, 28, 30, 32, 33, 35, 36 and 38 (16, 17, 19, 20, 21, 23, 24, 26, 28, 29, 31, 32 and 34) - 3.8 - v v ref input reference voltage on pin 19 (15) 3.7 3.8 3.9 v v n voltage on pins 2, 4, 6, 8, 10, 12, 14 and 16 (1, 3, 5, 7, 9, 11, 40 and 42) - 0 - v v cdcl,cdcr voltage on pins 40 and 42 (36 and 38) - 2.7 - v v cdcm voltage on pin 41 (37) - 2.8 - v i in3 input current at pin 18 (14) -- 1 m a
october 1994 10 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h ac characteristics all voltages referenced to ground at pins 9 and 34 (4 and 30). measured in test circuit fig.4; v p = 12 v; t amb =25 c; f mod = 1 khz; f om = 6.5 mhz; d f m = 46 khz; d f s1 = d f s2 = 27 khz (reference levels); f os1 = 10.52 mhz; f os2 = 10.7 mhz; hf level at pin 18 (14): 40 mv (rms); hf level at selected secondary inputs: 20 mv (rms); mcs = logic 0 [v 7 (v 2 ) = 0 v]; scd = logic 0 [v 11 (v 6 ) = 0 v]; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit main channel - hf input pin 18 (14) and limiter v in3(rms) input sensitivity (rms value) s/n(a) = 40 db - 1.0 2.0 mv v in3(rms) input signal level (rms value) -- 200 mv r in3 input resistance - 15 - k w main channel - pll fm demodulator and dc decoupling ampli?er f cco free-running frequency - 6.5 - mhz mcs = logic 1 - 10.7 - mhz d f om lock range of pll note 1 5.5 - 7.5 mhz mcs = logic 1; note 1 10.0 - 11.5 mhz r cdm output resistance for 50 m s de-emphasis pin 20 (16) 1.24 1.5 1.7 k w v cdm output voltage pin 20 (16) - 18.5 - 16.0 - 14.5 dbv d v cdm spread of pll output voltage over lock range pin 20 (16) -- 1db r ccm input resistance of output ampli?er pin 21 (17) 95 150 200 k w main channel - overall performance (output selector in position 4) v om,or,ol output voltage pins 23, 24 and 25 (19, 20 and 21) all plls locked - 9 - 6 - 4 dbv ubm unbalance voltage outputs pins 23 to 25 (19 to 21) output selector in position 4 - 0.5 - +0.5 db thd total harmonic distortion all plls locked - 0.1 0.5 % s/n(a) signal-to-noise ratio a-weighted; all plls locked 62 70 - db 15 khz frequency response with respect to 1 khz pin 23 (19) no de-emphasis connected - 0.5 0 + 0.5 db r om,or,ol output resistance pins 23, 24 and 25 (19, 20 and 21) 92 125 150 w a s/m crosstalk attenuation from secondary channels to main note 2 - 74 - db mute att mute attenuation output selector in position 7 74 -- db svrr supply voltage ripple rejection v rr = 100 mv; f i =70hz - 35 - db v om 15 khz () v om 1 khz () -------------------------------
october 1994 11 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h secondary channels 1 and 2 - hf inputs pins 2, 4, 6, 8, 10, 12, 14 and 16 (1, 3, 5, 7, 9, 11, 40 and 42) and limiters v in1,in2(rms) input sensitivity (rms value) s/n(a) = 40 db - 0.8 1.5 mv v i(rms) input signal level (rms value) -- 200 mv r i input resistance 260 330 380 w secondary channels 1 and 2 - pll fm demodulators (input selector in position 1) f cco1 free running frequency pll1 - 10.7 - mhz f cco2 free running frequency pll2 - 10.52 - mhz d f os1/2 lock range of plls note 3 10 - 11.5 mhz r s1, s2 series resistance for optimum frequency response adjustment 0 0.68 2.2 k w v cdcl,cdcr(rms) pll output voltage pins 40 and 42 (36 and 38) (rms value) pins to be left open-circuit - 9 - mv d v cdcl,cdcr spread of pll output voltage over lock range -- 1db secondary channels - overall performance of lpf and nr (output selectors in position 1) r o output resistance for 75 m s de-emphasis pins 36 and 32 (32 and 28) 1.9 2.3 2.6 k w r i input resistance of output ampli?ers pins 35 and 33 (31 and 29) 95 150 200 k w v ol,or output voltage level pins 25 and 24 (21 and 20) note 4 - 8 - 6 - 4 dbv ubs unbalance voltage outputs pins 25 and 24 (21 and 20) note 4 - 1 - +1 db thd total harmonic distortion note 4 - 0.1 0.5 % s/n(a) signal-to-noise ratio a-weighted; note 4 72 80 - db r o output resistance pins 25 and 24 (21 and 20) note 4 92 125 150 w mute att mute attenuation output selector in position 6; note 4 74 -- db a s/s crosstalk attenuation between secondary channels note 5 - 74 - db a m/s crosstalk attenuation from main channel to secondary note 6 - 74 - db v offset(dc) dc offset voltage on attack/recovery capacitors pins 29, 39 (25, 35) all plls locked; d f=0 14 16 20 mv svrr supply voltage ripple rejection v rr = 100 mv; f i =70hz - 25 - db symbol parameter conditions min. typ. max. unit
october 1994 12 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h secondary channels - low-pass ?lter pins 38 and 30 (34 and 26) 50 khz frequency response with respect to 1 khz note 7 - 25 - 16 - 9db secondary channels - noise reduction pins 25 and 24 (21 and 20); note 4 v ol, or output voltage at 0 db noise reduction input level d f s1 = d f s2 = 50 khz; no ?xed de-emphasis connected - 1 +1 +3 dbv 15 khz frequency response with respect to 1 khz at 0 db noise reduction input level d f s1 = d f s2 = 50 khz; no ?xed de-emphasis connected - 2 0 +2 db v ol,or output voltage at - 20 db noise reduction input level d f s1 = d f s2 = 5 khz; no ?xed de-emphasis connected - 29 - 26 - 23 dbv 15 khz frequency response with respect to 1 khz at - 20 db noise reduction input level d f s1 = d f s2 = 5 khz; no ?xed de-emphasis connected - 13 - 11.5 - 10 db external inputs - pin 28 (24) (left) and pin 27 (23) (right) - overall performance (output selector in position 5) v extr,extl input signal level -- 6 dbv r i input resistance 95 150 200 k w v ol,or output level v extr, extl = - 6 dbv - 6.5 - 6.0 - 5.5 dbv thd total harmonic distortion v extr, extl = - 6 dbv; f i = 1 khz -- 0.1 % s/n(a) signal-to-noise ratio a-weighted; v extr, extl = - 6 dbv 80 -- db a l/r , a r/l crosstalk f i = 1 khz - 80 - db input selector control circuit pins 3 and 5 (41 and 43) (see also table 1 ) and secondary channels plls disable [scd pin 11 (6)]; pin 11 (6); pins left open-circuit = logic high v il low level input voltage 0 - 1.2 v v ih high level input voltage 3.5 - 9v r i input resistance connected to v p 65 100 130 k w symbol parameter conditions min. typ. max. unit v rectl rectr 50 khz () , v rectl rectr 1 khz () , ---------------------------------------------------------- - v ol or 15 khz () , v ol or 1 khz () , --------------------------------------- v ol or 15 khz () , v ol or 1 khz () , ---------------------------------------
october 1994 13 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h notes 1. at pin 20 (16) the demodulated 1 khz signal should be present with a typical level of 158 mv (rms) ( - 16 dbv), and thd of maximum 0.5%; v p = 8 to 3.2 v; t amb = - 20 to +70 c. 2. modulation of main channel is off; modulation of secondary channels is on. 3. the electrolytic capacitors at pins 40 and 42 (36 and 38) are removed and 1500 pf capacitors between pin 40 (36) and ground and between pin 42 (38) and ground are connected. at pins 40 and 42 (36 and 38) the demodulated 1 khz signals should be present with typical levels of 9 mv (rms) and thd of maximum 0.5%; v p = 8 to 3.2 v; t amb = - 20 to +70 c. 4. all plls locked; r s1 =r s2 = 0.68 k w . 5. modulation of secondary channel being measured and main channel is off; modulation of other secondary channel is on. 6. modulation of main channel is on; modulation of secondary channels is off. 7. measured at pins 38 (34) (left) and 30 (26) (right) and no electrolytic capacitors connected to these pins. output selector control circuit (see also table 2 ) and main channel pll lock-in select [mcs pin 7 (2)]; pins 15, 17, 26, 13 and 7 (10, 13, 22, 8 and 2) mos inputs and should not be left open-circuit v il low level input voltage limits 0 - 1.2 v v im mid level input voltage limits for mcs pin only 1.8 - 2.8 v v imf mid level input voltage on mcs pin if mcs pin is ?oating v p must be 1.8 to 13.2 v 17 19 21 %v p v ih high level input voltage limits 3.5 - v p v r il low input resistance mcs pin to ground 12 19 26 k w r ih high input resistance mcs pin to v p 52 80 108 k w i il low level input current (not mcs pin) v il =0v -<- 1 -m a i ih high level input current (not mcs pin) v ih =5v -< 1 -m a symbol parameter conditions min. typ. max. unit
october 1994 14 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h table 1 truth table for input selection table 2 truth table for output selection (note 1) note 1. x = dont care. switch position state pin 3 (41) pin 5 (43) 1 pins 2 and 10; in-a (pins 40 and 5) 0 0 2 pins 4 and 12; in-b (pins 42 and 7) 0 1 3 pins 6 and 14; in-c (pins 1 and 9) 1 0 4 pins 8 and 16; in-d (pins 3 and 12 1 1 switch position state pin 15 (10) pin 17 (13) pin 26 (22) pin 13 (8) outsel l outsel r ext/ int mute 1 stereo 1100 2 left 1000 3 right 0100 4 main 0000 5 external x x 1 0 6 mute secondary x x 0 1 7 mute all x x 1 1
october 1994 15 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h fig.4 test circuit. the pin numbers in parenthesis refer to the qfp44 package.
october 1994 16 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h application information general this application is mainly intended to have more than two inputs for secondary channel available. in this event a choice between the same frequency sets e.g. 10.7 and 10.52 mhz but with different bandwidths is possible. a narrow bandwidth can be chosen in the event of a weak signal, however this produces slightly more distortion. a normal signal will be processed using 150 khz filters thus resulting in a signal with normal distortion. for the main channel either baseband or synthesized signal can be selected. the circuit is illustrated in fig.5.
october 1994 17 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h fig.5 application diagram. the pin numbers in parenthesis refer to the qfp44 package.
october 1994 18 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h package outlines fig.6 plastic shrink dual in-line package; 42 leads (600 mil); sdip42; sot270-1. dimensions in mm. handbook, full pagewidth 1 22 21 1.3 max 14.1 13.7 4.57 max 5.08 max 0.51 min 3.2 2.9 seating plane 0.18 m 0.53 max 1.778 (40x) 1.73 max 15.80 15.24 0.32 max 15.24 17.15 15.90 msa268 - 1 42 39.0 38.4
october 1994 19 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h fig.7 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm (qfp44; sot307-2). dimensions in mm. handbook, full pagewidth x a b 10.1 9.9 12.9 12.3 0.15 m b 0.40 0.20 pin 1 index 1 44 34 33 23 22 11 0.40 0.20 0.15 m a 0.8 12 0.8 10.1 9.9 12.9 12.3 s 0.1 s seating plane 1.2 0.8 (4x) 1.2 0.8 (4x) 0.95 0.55 mbb944 - 2 detail x 0.85 0.75 0.25 0.14 2.10 1.70 0 to 10 o 1.85 1.65 0.25 0.05
october 1994 20 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h soldering plastic dual in-line packages b y dip or wave the maximum permissible temperature of the solder is 260 c; this temperature must not be in contact with the joint for more than 5 s. the total contact time of successive solder waves must not exceed 5 s. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply the soldering iron below the seating plane (or not more than 2 mm above it). if its temperature is below 300 c, it must not be in contact for more than 10 s; if between 300 and 400 c, for not more than 5 s. plastic quad ?at packages b ywave during placement and before soldering, the component must be fixed with a droplet of adhesive. after curing the adhesive, the component can be soldered. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 c within 6 s. typical dwell time is 4 s at 250 c. a modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. b y solder paste reflow reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. dwell times vary between 50 and 300 s according to method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 min at 45 c. r epairing soldered joints ( by hand - held soldering iron or pulse - heated solder tool ) fix the component by first soldering two, diagonally opposite, end pins. apply the heating tool to the flat part of the pin only. contact time must be limited to 10 s at up to 300 c. when using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 c. (pulse-heated soldering is not recommended for so packages.) for pulse-heated solder tool (resistance) soldering of vso packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
october 1994 21 philips semiconductors product speci?cation satellite sound circuit with noise reduction TDA8742; TDA8742h definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.

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